Aufgaben:Exercise 1.6: Cyclic Redundancy Check - Revision history

Hwang at 15:31, 23 January 2023

2023-01-23T15:31:27Z

Hwang at 15:24, 9 November 2022

2022-11-09T15:24:49Z

Guenter at 15:13, 28 October 2022

2022-10-28T15:13:08Z

Guenter at 15:01, 28 October 2022

2022-10-28T15:01:07Z

Guenter at 14:44, 28 October 2022

2022-10-28T14:44:27Z

Guenter at 13:52, 28 October 2022

2022-10-28T13:52:36Z

Guenter at 15:54, 27 October 2022

2022-10-27T15:54:34Z

Guenter at 14:58, 27 October 2022

2022-10-27T14:58:34Z

Hwang at 20:58, 25 October 2022

2022-10-25T20:58:15Z

Hwang at 14:00, 11 October 2022

2022-10-11T14:00:15Z

@@ Line 103: / Line 103: @@
 *This is true for the second solution,&nbsp; as a comparison with subtasks&nbsp; '''(1)'''&nbsp; and&nbsp; '''(2)'''&nbsp; shows.&nbsp; It is valid without remainder:
 :$$(D^{11}+D^9+D^8+D^6+D^5+D^3+D+1) : (D^4+ D+1)= D^7+D^5+D^3+1 \hspace{0.05cm}.$$
-*In solution 1 the 6th information bit was corrupted,&nbsp; in solution 3 the CRC1 bit.
+*In solution 1 the 6th information bit was falsified,&nbsp; in solution 3 the CRC1 bit.

@@ Line 67: / Line 67: @@
 - $1011 \hspace{0.1cm}0110\hspace{0.08cm} 1001$.
-{Which of the folloing received bit sequences were falsified during transmission?
+{Which of the following received bit sequences were falsified during transmission?
 |type="[]"}
 + $0000 \hspace{0.1cm}0111 \hspace{0.1cm}0010$,

@@ Line 120: / Line 120: @@
 :$$\hspace{0.3cm}\Rightarrow \hspace{0.3cm}\text{remainder:}\hspace{0.15cm}0\hspace{0.05cm},$$
 $$\ (3) \ \hspace{0.2cm}(D^7+D^6+D^5+D^4+D^3+1) : (D^4+ D+1)$$
-:$$\hspace{0.3cm}\Rightarrow \hspace{0.3cm}\text{remainder:}\hspace{0.15cm}D^3\hspace{0.05cm},$$
+:$$\hspace{0.3cm}\Rightarrow \hspace{0.3cm}\text{remainder:}\hspace{0.15cm}D^3\hspace{0.05cm}.$$
 {{ML-Fuß}}

@@ Line 38: / Line 38: @@
 *The exercise belongs to the chapter&nbsp; [[Examples_of_Communication_Systems/ISDN_Primary_Multiplex_Connection|"ISDN Primary Multiplex Connection"]] .
-*To solve the exercise, some basic knowledge of&nbsp; [[Channel_Coding|"channel coding]]&nbsp; is required.
+*To solve the exercise, some basic knowledge of&nbsp; [[Channel_Coding|"Channel Coding"]]&nbsp; is required.
@@ Line 79: / Line 79: @@
 '''(1)'''&nbsp; The&nbsp; <u>Solution 2</u>&nbsp; is correct:
-*Due to the largest numerator exponent&nbsp; $(D^{11})$&nbsp; and the highest denominator exponent&nbsp; $(D^{4})$,&nbsp; the first suggestion&nbsp; $E(D) = D^{5} + D^{3} + 1$&nbsp; can be excluded as the result &nbsp; &rArr; &nbsp; $E(D) \ne D^{7} + D^{5} + D^{3} + 1$.
+*Due to the largest numerator exponent&nbsp; $(D^{11})$&nbsp; and the highest denominator exponent&nbsp; $(D^{4})$,&nbsp; the first suggestion&nbsp; $E(D) = D^{5} + D^{3} + 1$&nbsp; can be excluded as the result &nbsp; &rArr; &nbsp; $E(D) = D^{7} + D^{5} + D^{3} + 1$.
 *Modulo-2 multiplication of&nbsp; $E(D)$&nbsp; by the generator polynomial&nbsp; $G(D) = D^{4} + D + 1$&nbsp; yields:

@@ Line 61: / Line 61: @@
 $\rm CRC3 \ = \ $ { 1 3% }
-{The following bit sequences arrive at the receiver,&nbsp; eight information bits each plus&nbsp; $\text{  (CRC3, CRC2, CRC1,CRC0)}$.&nbsp; What bit sequences indicate that there is no bit error?
+{The following bit sequences arrive at the receiver,&nbsp; eight information bits each plus&nbsp; $\text{  (CRC3, CRC2, CRC1,CRC0)}$.&nbsp; <br>What bit sequences indicate that there is no bit error?
 |type="[]"}
 - $1011 \hspace{0.1cm}0010\hspace{0.08cm} 1011$,
@@ Line 78: / Line 78: @@
 {{ML-Kopf}}
-'''(1)'''&nbsp; <u>Solution 2</u> is correct:
+'''(1)'''&nbsp; The&nbsp; <u>Solution 2</u>&nbsp; is correct:
-*Due to the largest numerator exponent $(D^{11})$ and the highest denominator exponent $(D^{4})$, the first suggestion $E(D) = D^{5} + D^{3} + 1$ can be excluded as the result &nbsp; &rArr; &nbsp; $E(D) = D^{7} + D^{5} + D^{3} + 1$.
+*Due to the largest numerator exponent&nbsp; $(D^{11})$&nbsp; and the highest denominator exponent&nbsp; $(D^{4})$,&nbsp; the first suggestion&nbsp; $E(D) = D^{5} + D^{3} + 1$&nbsp; can be excluded as the result &nbsp; &rArr; &nbsp; $E(D) \ne D^{7} + D^{5} + D^{3} + 1$.
+*Modulo-2 multiplication of&nbsp; $E(D)$&nbsp; by the generator polynomial&nbsp; $G(D) = D^{4} + D + 1$&nbsp; yields:
 :$$E(D) \cdot G(D) \ = \ (D^7+ D^5+D^3+1)\cdot (D^4+ D+1) \ = D^{11}+D^8+D^7+D^9+D^6+D^5+D^7+D^4+D^3+D^4+ D+1 \hspace{0.05cm}.$$
 *It must be taken into account here that for modulo-2 calculations $D^{4} + D^{4} = 0$. This results in the following remainder:
@@ Line 89: / Line 88: @@
   [[File:EN_Bei_A_1_6b_ML.png|right|frame|Register assignments for CRC4]]
-'''(2)'''&nbsp; From the result of subtask '''(1)''' follows:
+'''(2)'''&nbsp; From the result of subtask&nbsp; '''(1)'''&nbsp; follows:
 :$${\rm CRC0 = 1},\hspace{0.2cm}{\rm CRC1 = 1},\hspace{0.2cm}{\rm CRC2 = 0},\hspace{0.2cm}{\rm CRC3 = 1}\hspace{0.05cm}.$$
-The table shows a second way of solution: It contains the register assignments of the given circuit at the times 0, ... , 8.
+*The table shows a second way of solution:&nbsp;
-<br clear=all>
-'''(3)'''&nbsp; Only <u>solution 2</u> is correct:
+*It contains the register assignments of the given circuit at times&nbsp; $0$, ... , $8$.
-*The receiver divides the polynomial $P(D)$ of the receive sequence by the generator polynomial $G(D)$.
 *If this modulo-2 division returns the remainder $R(D) = 0$, then all 12 bits were transmitted correctly.
 *This is true for the second solution, as a comparison with subtasks (1) and (2) shows. It is valid without remainder:
 :$$(D^{11}+D^9+D^8+D^6+D^5+D^3+D+1) : (D^4+ D+1)= D^7+D^5+D^3+1 \hspace{0.05cm}.$$
-*In solution 1 the 6th information bit was corrupted, in solution 3 the CRC1 bit.
+*In solution 1 the 6th information bit was corrupted,&nbsp; in solution 3 the CRC1 bit.
 '''(4)'''&nbsp; <u>Solutions 1 and 3</u> are correct:
-*The diagram illustrates the modulo-2 divisions for the given received sequences in simplified form (with zeros and ones).
+[[File:EN_Bei_A_1_6d.png|right|frame|Polynomial division of the three received sequences]]
-*You can see that only for sequence 2 the division without remainder is possible.
-*In written form, the polynomial divisions are:
+*The diagram illustrates the modulo-2 divisions for the given received sequences in simplified form&nbsp; (with zeros and ones).
-:$$\ (1) \ \hspace{0.2cm}(D^6+D^5+D^4+1) : (D^4+ D+1)\hspace{0.3cm}\Rightarrow \hspace{0.3cm}{\rm Rest}\hspace{0.15cm}D^3+ D+1\hspace{0.05cm},$$
-:$$\ (2) \ \hspace{0.2cm}(D^7+D^6+D^5+D^4+1) : (D^4+ D+1)\hspace{0.3cm}\Rightarrow \hspace{0.3cm}{\rm ohne \hspace{0.15cm}Rest}\hspace{0.05cm},$$
+*You can see that only for sequence 2 the division  is possible without remainder.
-:$$\ (3) \ \hspace{0.2cm}(D^7+D^6+D^5+D^4+D^3+1) : (D^4+ D+1) \hspace{0.3cm}\Rightarrow \hspace{0.3cm}{\rm Rest}\hspace{0.15cm}D^3\hspace{0.05cm}.$$
-[[File:EN_Bei_A_1_6d.png|center|frame|Polynomial division of the three received sequences]]
+*In written form, is possible the polynomial divisions are:
 {{ML-Fuß}}

@@ Line 5: / Line 5: @@
 }}
-[[File:P_ID1626__Bei_A_1_6.png|right|frame|Formation of the CRC4 checksum]]
+[[File:P_ID1626__Bei_A_1_6.png|right|frame|CRC4 checksum formation]]
-The synchronization happens at the primary multiplex connection in each case in channel&nbsp; $0$&nbsp; – the synchronization channel - of each frame:
+The synchronization happens at the primary multiplex connection in each case in synchronization channel&nbsp; "$0$"&nbsp;  of each frame:
-* For odd time frames&nbsp; (number 1, 3, ... , 15)&nbsp; this transmits the so-called "frame password" with the fixed bit pattern&nbsp; $\rm X001\hspace{0.05cm} 1011$.
+# For odd time frames&nbsp; (number 1, 3, ... , 15)&nbsp; this transmits the so-called&nbsp; "frame password"&nbsp; with the fixed bit pattern&nbsp; $\rm X001\hspace{0.05cm} 1011$.
-* Each even frame&nbsp; (with number 2, 4, ... , 16)&nbsp; on the other hand contains the "message word"&nbsp; $\rm X1DN\hspace{0.05cm}YYYY$.
+# Each even frame&nbsp; (with number 2, 4, ... , 16)&nbsp; on the other hand contains the&nbsp; "message word"&nbsp; $\rm X1DN\hspace{0.05cm}YYYY$.
-*Error messages are signaled via the&nbsp; $\rm D$ bit and the &nbsp; $\rm N$ bit, and the four&nbsp; $\rm Y$ bits are reserved for service functions.
+# Error messages are signaled via the&nbsp; $\rm D$&nbsp; bit and the &nbsp; $\rm N$&nbsp; bit.&nbsp; The four&nbsp; $\rm Y$&nbsp; bits are reserved for service functions.
-The&nbsp; $\rm X$ bit is obtained in each case by the ''CRC4'' method, the implementation of which is shown in the diagram:
+The&nbsp; $\rm X$&nbsp; bit is obtained in each case by the&nbsp; "CRC4 method",&nbsp; the implementation of which is shown in the diagram:
-*From eight input bits each - in the entire exercise the bit sequence&nbsp; $\rm 1011\hspace{0.05cm} 0110$ is assumed for this purpose - the four check bits&nbsp; $\rm CRC3$, ... , $\rm CRC0$&nbsp; are obtained by modulo-2 additions and shifts, which are added to the input word in this order.
+*From eight input bits each - in the entire exercise the bit sequence&nbsp; "$\rm 1011\hspace{0.05cm} 0110$"&nbsp; is assumed for this purpose - the four check bits&nbsp; $\rm CRC3$, ... , $\rm CRC0$&nbsp; are obtained by modulo-2 additions and shifts,&nbsp; which are added to the input word in this order.
 *Before the first bit is shifted into the register, all registers are filled with zeros:
 :$${\rm CRC3 = CRC2 =CRC1 =CRC0 = 0}\hspace{0.05cm}.$$
-*After eight shift clocks, the four registers&nbsp; $\rm CRC3$, ... , $\rm CRC0$&nbsp; contains the CRC4 checksum.
+*After eight shift clocks,&nbsp; the four registers&nbsp; $\rm CRC3$, ... , $\rm CRC0$&nbsp; contains the CRC4 checksum.
@@ Line 23: / Line 24: @@
 *The corresponding generator polynomial is:
 :$$G(D) = D^4 + D +1 \hspace{0.05cm}.$$
-*The CRC4 checksum on the transmission side is also obtained as the&nbsp; '''remainder'''&nbsp; of the polynomial division
+*The CRC4 checksum on the transmission side is also obtained as the &nbsp; "'''remainder'''" &nbsp; of the polynomial division
 :$$(D^{11} +D^{9} +D^{8}+D^{6}+D^{5})/G(D) \hspace{0.05cm}.$$
-*The divisor polynomial results from the input sequence and four appended zeros:&nbsp; $\rm 1011\hspace{0.09cm} 0110\hspace{0.09cm} 0000$.
+*The divisor polynomial results from the input sequence and four appended zeros:&nbsp; "$\rm 1011\hspace{0.09cm} 0110\hspace{0.09cm} 0000$".
@@ Line 36: / Line 35: @@
-''Notes:''
+Notes:
 *The exercise belongs to the chapter&nbsp; [[Examples_of_Communication_Systems/ISDN_Primary_Multiplex_Connection|"ISDN Primary Multiplex Connection"]] .
@@ Line 62: / Line 61: @@
 $\rm CRC3 \ = \ $ { 1 3% }
-{The following bit sequences arrive at the receiver, &nbsp; $\text{eight information bits each plus  (CRC3, CRC2, CRC1,CRC0)}$. <br>When is there no bit error?
+{The following bit sequences arrive at the receiver,&nbsp; eight information bits each plus&nbsp; $\text{  (CRC3, CRC2, CRC1,CRC0)}$.&nbsp; What bit sequences indicate that there is no bit error?
 |type="[]"}
 - $1011 \hspace{0.1cm}0010\hspace{0.08cm} 1011$,
@@ Line 68: / Line 67: @@
 - $1011 \hspace{0.1cm}0110\hspace{0.08cm} 1001$.
-{Which received bit sequences were falsified during transmission?
+{Which of the folloing received bit sequences were falsified during transmission?
 |type="[]"}
 + $0000 \hspace{0.1cm}0111 \hspace{0.1cm}0010$,

@@ Line 20: / Line 20: @@
-Die Anzapfungen des Schieberegisters sind&nbsp; $g_{0} = 1, \ g_{1} = 1, \ g_{2} = 0, \ g_{3} = 0$&nbsp; und&nbsp; $g_{4} = 1$.
+The taps of the shift register are&nbsp; $g_{0} = 1, \ g_{1} = 1, \ g_{2} = 0, \ g_{3} = 0$&nbsp; and&nbsp; $g_{4} = 1$.
-*Das dazugehörige Generatorpolynom lautet:
+*The corresponding generator polynomial is:
 :$$G(D) = D^4 + D +1 \hspace{0.05cm}.$$
-*Die sendeseitige CRC4–Prüfsumme erhält man auch als&nbsp; '''Rest'''&nbsp; der Polynomdivision
+*The CRC4 checksum on the transmission side is also obtained as the&nbsp; '''remainder'''&nbsp; of the polynomial division
 :$$(D^{11} +D^{9} +D^{8}+D^{6}+D^{5})/G(D) \hspace{0.05cm}.$$
-*Das Divisorpolynom ergibt sich aus der Eingangsfolge und vier angehängten Nullen:&nbsp; $\rm 1011\hspace{0.09cm} 0110\hspace{0.09cm} 0000$.
+*The divisor polynomial results from the input sequence and four appended zeros:&nbsp; $\rm 1011\hspace{0.09cm} 0110\hspace{0.09cm} 0000$.
-Auch die CRC4–Überprüfung beim Empfänger entsprechend Teilaufgabe&nbsp; '''(4)''' &nbsp;kann durch eine Polynomdivision dargestellt werden. Sie lässt sich durch eine Schieberegisterstruktur in ähnlicher Weise realisieren wie die sendeseitige Gewinnung der CRC4–Prüfsumme.
+The CRC4 check at the receiver according to subtask&nbsp; '''(4)''' &nbsp;can also be represented by a polynomial division. It can be implemented by a shift register structure in a similar way as the CRC4 checksum is obtained at the transmitting end.
@@ Line 36: / Line 36: @@
-''Hinweise:''
+''Notes:''
-*Die Aufgabe gehört zum Kapitel&nbsp; [[Examples_of_Communication_Systems/ISDN_Primary_Multiplex_Connection|"ISDN Primary Multiplex Connection"]] .
+*The exercise belongs to the chapter&nbsp; [[Examples_of_Communication_Systems/ISDN_Primary_Multiplex_Connection|"ISDN Primary Multiplex Connection"]] .
-*Zur Lösung der Aufgabe werden einige Grundkenntnisse der&nbsp; [[Channel_Coding|Kanalcodierung]]&nbsp; vorausgesetzt.
+*To solve the exercise, some basic knowledge of&nbsp; [[Channel_Coding|"channel coding]]&nbsp; is required.
-===Fragebogen===
+===Questions===
 <quiz display=simple>
-{Welches Ergebnis&nbsp; $E(D)$&nbsp; und welchen Rest&nbsp; $R(D)$&nbsp; liefert die Polynomdivision
+{Which result&nbsp; $E(D)$&nbsp; and which remainder&nbsp; $R(D)$&nbsp; results from the polynomial division
 $(D^{11} + D^{9} + D^{8} + D^{6} + D^{5}) : (D^{4} + D + 1)$&nbsp;?
 |type="()"}
@@ Line 55: / Line 55: @@
 - $E(D) = D^{7} + D^{5} + D^{3} + 1, \hspace{1cm}R(D) = 0$.
-{Wie lautet die CRC–Prüfsumme im vorliegenden Fall?
+{What is the CRC checksum in the present case?
 |type="{}"}
 $\rm CRC0 \ = \ $ { 1 3% }
@@ Line 62: / Line 62: @@
 $\rm CRC3 \ = \ $ { 1 3% }
-{Am Empfänger kommen folgende Bitfolgen an, jeweils&nbsp; $\text{acht Informationsbits plus  (CRC3, CRC2, CRC1,CRC0)}$. <br>Wann liegt kein Bitfehler vor?
+{The following bit sequences arrive at the receiver, &nbsp; $\text{eight information bits each plus  (CRC3, CRC2, CRC1,CRC0)}$. <br>When is there no bit error?
 |type="[]"}
 - $1011 \hspace{0.1cm}0010\hspace{0.08cm} 1011$,
@@ Line 68: / Line 68: @@
 - $1011 \hspace{0.1cm}0110\hspace{0.08cm} 1001$.
-{Welche empfangene Bitfolgen wurden bei der Übertragung verfälscht?
+{Which received bit sequences were falsified during transmission?
 |type="[]"}
 + $0000 \hspace{0.1cm}0111 \hspace{0.1cm}0010$,
@@ Line 76: / Line 76: @@
 </quiz>
-===Musterlösung===
+===Solution===
 {{ML-Kopf}}
-'''(1)'''&nbsp; Richtig ist <u>der Lösungsvorschlag 2</u>:
+'''(1)'''&nbsp; <u>Solution 2</u> is correct:
-*Aufgrund des größten Zählerexponenten $(D^{11})$ und des höchsten Nennerexponenten $(D^{4})$ kann der erste Vorschlag $E(D) = D^{5} + D^{3} + 1$ als Ergebnis ausgeschlossen werden &nbsp; &rArr; &nbsp; $E(D) = D^{7} + D^{5} + D^{3} + 1$.
+*Due to the largest numerator exponent $(D^{11})$ and the highest denominator exponent $(D^{4})$, the first suggestion $E(D) = D^{5} + D^{3} + 1$ can be excluded as the result &nbsp; &rArr; &nbsp; $E(D) = D^{7} + D^{5} + D^{3} + 1$.
-*Die Modulo–2–Multiplikation von $E(D)$ mit dem Generatorpolynom $G(D) = D^{4} + D + 1$ liefert:
+*Modulo-2 multiplication of $E(D)$ by the generator polynomial $G(D) = D^{4} + D + 1$ yields:
 :$$E(D) \cdot G(D) \ = \ (D^7+ D^5+D^3+1)\cdot (D^4+ D+1) \ = D^{11}+D^8+D^7+D^9+D^6+D^5+D^7+D^4+D^3+D^4+ D+1 \hspace{0.05cm}.$$
-*Zu berücksichtigen ist hierbei, dass bei Modulo–2–Rechnungen $D^{4} + D^{4} = 0$ gilt. Damit ergibt sich der folgende Rest:
+*It must be taken into account here that for modulo-2 calculations $D^{4} + D^{4} = 0$. This results in the following remainder:
 :$$R(D) = D^{11}+D^9+D^8+D^6+D^5- E(D) \cdot G(D) = D^3+D+1 \hspace{0.05cm}.$$
-  [[File:P_ID1628__Bei_A_1_6b.png|right|frame|Registerbelegungen bei CRC4]]
+  [[File:P_ID1628__Bei_A_1_6b.png|right|frame|Register assignments for CRC4]]
-'''(2)'''&nbsp; Aus dem Ergebnis der Teilaufgabe '''(1)''' folgt:
+'''(2)'''&nbsp; From the result of subtask '''(1)''' follows:
 :$${\rm CRC0 = 1},\hspace{0.2cm}{\rm CRC1 = 1},\hspace{0.2cm}{\rm CRC2 = 0},\hspace{0.2cm}{\rm CRC3 = 1}\hspace{0.05cm}.$$
-Die Tabelle zeigt einen zweiten Lösungsweg auf: Sie enthält die Registerbelegungen der gegebenen Schaltung zu den Zeiten 0, ... , 8.
+The table shows a second way of solution: It contains the register assignments of the given circuit at the times 0, ... , 8.
 <br clear=all>
-'''(3)'''&nbsp; Richtig ist nur der <u>Lösungsvorschlag 2</u>.:
+'''(3)'''&nbsp; Only <u>solution 2</u> is correct:
-*Der Empfänger teilt das Polynom $P(D)$ der Empfangsfolge durch das Generatorpolynom $G(D)$.
+*The receiver divides the polynomial $P(D)$ of the receive sequence by the generator polynomial $G(D)$.
-*Liefert diese Modulo–2–Division den Rest $R(D) = 0$, so wurden alle 12 Bit richtig übertragen.
+*If this modulo-2 division returns the remainder $R(D) = 0$, then all 12 bits were transmitted correctly.
-*Dies trifft für den zweiten Lösungsvorschlag zu, wie ein Vergleich mit den Teilaufgaben (1) und (2) zeigt. Es gilt ohne Rest:
+*This is true for the second solution, as a comparison with subtasks (1) and (2) shows. It is valid without remainder:
 :$$(D^{11}+D^9+D^8+D^6+D^5+D^3+D+1) : (D^4+ D+1)= D^7+D^5+D^3+1 \hspace{0.05cm}.$$
-*Bei Lösungsvorschlag 1 wurde das 6. Informationsbit verfälscht, beim Lösungsvorschlag 3  das CRC1–Bit.
+*In solution 1 the 6th information bit was corrupted, in solution 3 the CRC1 bit.
-'''(4)'''&nbsp; Richtig sind  <u>die Lösungsvorschläge 1 und 3</u>:
+'''(4)'''&nbsp; <u>Solutions 1 and 3</u> are correct:
-*Die Grafik verdeutlicht die Modulo–2–Divisionen für die gegebenen Empfangsfolgen in vereinfachter Form (mit Nullen und Einsen).
+*The diagram illustrates the modulo-2 divisions for the given received sequences in simplified form (with zeros and ones).
-*Man erkennt, dass nur bei der Folge 2 die Division ohne Rest möglich ist.
+*You can see that only for sequence 2 the division without remainder is possible.
-*In ausgeschriebener Form lauten die Polynomdivisionen:
+*In written form, the polynomial divisions are:
 :$$\ (1) \ \hspace{0.2cm}(D^6+D^5+D^4+1) : (D^4+ D+1)\hspace{0.3cm}\Rightarrow \hspace{0.3cm}{\rm Rest}\hspace{0.15cm}D^3+ D+1\hspace{0.05cm},$$
 :$$\ (2) \ \hspace{0.2cm}(D^7+D^6+D^5+D^4+1) : (D^4+ D+1)\hspace{0.3cm}\Rightarrow \hspace{0.3cm}{\rm ohne \hspace{0.15cm}Rest}\hspace{0.05cm},$$
 :$$\ (3) \ \hspace{0.2cm}(D^7+D^6+D^5+D^4+D^3+1) : (D^4+ D+1) \hspace{0.3cm}\Rightarrow \hspace{0.3cm}{\rm Rest}\hspace{0.15cm}D^3\hspace{0.05cm}.$$
-[[File:P_ID1629__Bei_A_1_6d.png|center|frame|Polynomdivision der drei Empfangsfolgen]]
+[[File:P_ID1629__Bei_A_1_6d.png|center|frame|Polynomial division of the three received sequences]]
 {{ML-Fuß}}